1. Field of the Invention
The present invention relates to a laser beam processing apparatus that processes a semiconductor wafer with a laser beam in production of semiconductor devices, and a laser beam processing method executed in such a laser beam processing apparatus. Further, the present invention relates to a semiconductor wafer processed by the laser beam processing apparatus.
2. Description of the Related Art
In a representative process of producing a plurality of semiconductor devices, for example, a silicon wafer is prepared, and a surface of the silicon wafer is sectioned into a plurality of semiconductor chip areas which are defined by grid-like scribe lines formed in the silicon wafer. Note, each of the scribe lines has a width falling within a range between 40 μm and 70 μm.
The silicon wafer is processed by various well-known methods such that each of the semiconductor chip areas is produced as a semiconductor device, and a multi-layered wiring structure including a plurality of wiring arrangement sections defined therein is formed over the silicon wafer such that the respective wiring arrangement sections are allocated to the semiconductor devices, with the grid-like scribe lines being covered with multi-layered wiring structure.
Thereafter, the silicon wafer is subjected to a dicing process in which the plurality of semiconductor devices (i.e. bare chips) are cut along the grid-like scribe lines so as to be individually separated from each other.
The dicing process is automatically carried out in a dicing apparatus. In particular, the dicing apparatus includes a table on which the silicon wafer is mounted, and a rotary cutting blade which is associated with the table. During the dicing process, the rotary cutting blade is rotationally driven, and the table carrying the silicon wafer is automatically moved with respect to the rotating cutting blade such that the silicon wafer is cut along the scribe lines. Before this automatic cutting operation can be properly carried out, the silicon wafer must be precisely positioned at an initial position with respect to the rotating cutting blade.
JP-A-H01-304721 discloses a silicon wafer which is provided with at least one alignment mark formed on any one of cross points defined by the grid-like scribe lines, and it is possible for the dicing apparatus to precisely position the silicon wafer at an initial position by detecting the alignment mark. The alignment mark may be formed of aluminum by using a photolithography process and an etching process. Note, in addition to the alignment mark, test electrode pads, test circuit patterns and so on may be formed on the grid-like scribe lines, as disclosed in, for example, JP-2002-176140.
As well known, the multilayered wiring structure is composed of insulating interlayers and wiring metal pattern layers alternately laminated on each other, and each of the insulating interlayers is made of suitable dielectric material, such as silicon dioxide, low-k material or the like. These insulating interlayers are more fragile in comparison with the silicon wafer per se, and thus chips or cracks may easily occur in the multilayered wiring structure along the gridlike scribe lines thereof during the dicing process. When the chips or cracks penetrate into one of the wiring arrangement sections allocated to the semiconductor devices, the semiconductor device concerned becomes defective. This problem has become more severe with the recent advance of miniaturization of semiconductor devices, because the width of the grid-like scribe lines has become narrower due to the advanced miniaturization.
It is proposed that the silicon wafer be processed by a laser beam processing apparatus before it is subjected to the dicing process, to prevent the penetration of the chips or cracks into the wiring arrangement sections allocated to the semiconductor devices, as disclosed in, for example, JP-2002-329686 and JP-2003-320466. In particular, in the laser beam processing apparatus, the multi-layered wiring structure is irradiated with a laser beam along the grid-like scribe lines so that only the multi-layered wiring structure is cut into the wiring arrangement sections. In other words, the multi-layered wiring structure is partially removed from the silicon wafer along grid-like scribe lines.
When the processed silicon wafer is transferred from the laser beam processing apparatus to a dicing apparatus, or when the processed silicon wafer is shipped to a factory in which the processed silicon wafer is diced by using a dicing apparatus, it is difficult to efficiently and automatically carry out a dicing process in the dicing apparatus, because the alignment mark is eliminated from the processed silicon wafer. In particular, as stated above, before an efficient and automatic dicing process can be properly carried out, the silicon wafer must be precisely positioned at an initial position with respect to the rotating cutting blade of the dicing apparatus. Nevertheless, it is impossible to utilize the alignment mark for the precise positioning of the processed silicon wafer in the initial position.